Supervise Test & Finish Process Techs in the daily line sustaining of process engineering activities
Ensure to meet Finish Yield target and spearhead defect reduction programs.
Work closely with Equipment, Process control, Production in meeting daily KPI targets
Lead or support investigations / analysis on customer complaints
Ensure process standards and controls are properly implemented & followed.
Spearheads reduction of non-value added activities to improve productivity and efficiency.
Oversee product conformance to requirements
Perform yield analysis and defect reduction before production ramp up
Work with Customers and Suppliers on Test & Finish related activities
A graduate of BS Electronics, Electrical Engineering or Mechanical Engineering
With at least 5 years’ experience in Test and Finish engineering in the semiconductor industry.
With solid understanding of integrated circuits, semiconductor assembly, test, and finishing manufacturing, statistics, and semiconductor test methodologies.
Knowledge in wafer-level CSP, QFN, COL packages is preferred.
Familiarity on ICs failure analysis, taking the lead up to the die level.
An open-minded personality and passion about working in multi-functional environments.
Strong communication and interpersonal skills, able to connect, collaborate well with stakeholders (customer, suppliers, and colleagues)
With knowledge on new product qualification / methodologies
With exposure and know-how about tape & reel process (turret-type / gantry-type machines). Has in-depth knowledge in tape & reel handling & vision systems.
Experience in data analysis tools such as JMP is preferred.
Knowledgeable on FMEA, MSA, SPC, 8D is required.
Asia-Pacific, Philippines, Calamba
Education level required
4 - Bachelor degree
Experience level required
English (2- Business fluent)
30 / 05 / 2022