CAD Engineer
Microchip Technology
Manila, PH
17h ago

Job Description

Microchip’s CAD team is looking for a Design For Test engineer in Bangalore to support DFT related activities. The primary responsibility of the candidate will be to provide support for scan insertion, scan compression ATPG and Memory BIST using tools such as DFT Compiler, Fastscan, TestKompress, Tessent MBIST.

Other job responsibilities may include

  • Developing new DFT flows and improving existing DFT flows
  • Recommending design modifications to improve tool usage and test coverage
  • Providing tool and flow training to design engineers
  • Evaluating DFT tools
  • Working with tool vendors on tool and flow issues
  • Job Requirements

  • BSEE, MSEE preferred with 3 to 9 years of DFT related experience
  • Strong background in logic design, able to read and write RTL (Verilog)
  • Hands on experience with the following tools : Synopsys DFT Compiler Tessent Fastscan Tessent TestKompress Tessent MBIST Tessent Diagnosis
  • Experience in hierarchical DFT a plus
  • Experience with Synopsys Tetramax a plus
  • Excellent verbal and written communication and interpersonal skills
  • Some travel may be necessary
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